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Specifications
Interface:
I2C
Operating Temperature:
-40℃~+85℃
Voltage - Supply:
2.62V~3.6V
Mfr. Part #:
VCNL36826S
Package:
SMD-8P
Key Attributes
Model Number:
VCNL36826S
Product Description
Product Overview
The VCNL36826S is a surface-mount proximity sensor with an integrated VCSEL and I2C interface. It features photodiodes, amplifiers, and analog-to-digital converting circuits on a single chip. The sensor offers programmable interrupt functions with individual high and low thresholds for efficient resource utilization and power saving in microcontrollers. Its applications include handheld, consumer, and industrial devices.
Product Attributes
- Package Type: Surface-mount
- Dimensions (L x W x H in mm): 2.55 x 2.05 x 1.0
- Floor life: 168 h, MSL 3, according to J-STD-020
- Material categorization: For definitions of compliance please see www.vishay.com/doc?99912
Technical Specifications
| Part Number | Operating Range (mm) | Operating Voltage Range (V) | I2C Bus Voltage Range (V) | VCSEL Driving Current (mA) | Output Code | ADC Resolution | Proximity / Ambient Light |
| VCNL36826S | 200 | 2.62 to 3.6 | 1.7 to 3.6 | 20 | 12 bit, I2C | 12 bit / - | Proximity |
| Parameter | Test Condition | Symbol | Min. | Typ. | Max. | Unit |
| Supply voltage | (2) | VDD | 2.62 | - | 3.6 | V |
| Supply current | Excluding VCSEL driving | IDD | - | 100 | 300 | A |
| Shutdown current | Light condition = dark; VDD = 3.3 V, Tamb = 25 C | IDD (SD) | - | 1 | - | A |
| I2C supply voltage | VPULL UP | 1.65 | - | - | V | |
| I2C signal input, logic high | VDD = 3.3 V | VIH | 1.26 | - | - | V |
| I2C signal input, logic low | VDD = 3.3 V | VIL | - | - | 0.73 | V |
| Peak wavelength of VCSEL | IF = 10 mA | p(VCSEL) | - | 940 | - | nm |
| PS view angle | (3) | - | - | 60 | - | |
| VCSEL driving current | - | - | - | 20 | mA |
| Parameter | Symbol | Standard Mode Min. | Standard Mode Max. | Fast Mode Min. | Fast Mode Max. | Unit |
| Clock frequency | f(I2CCLK) | 10 | 100 | 10 | 400 | kHz |
| Bus free time between start and stop condition | t(BUF) | 4.7 | - | 1.3 | - | s |
| Hold time after (repeated) start condition; after this period, the first clock is generated | t(HDSTA) | 4.0 | - | 0.6 | - | s |
| Repeated start condition setup time | t(SUSTA) | 4.7 | - | 0.6 | - | s |
| Stop condition setup time | t(SUSTO) | 4.0 | - | 0.6 | - | s |
| Data hold time | t(HDDAT) | 0 | 3450 | 0 | 900 | ns |
| Data setup time | t(SUDAT) | 250 | - | 100 | - | ns |
| I2C clock (SCK) low period | t(LOW) | 4.7 | - | 1.3 | - | s |
| I2C clock (SCK) high period | t(HIGH) | 4.0 | - | 0.6 | - | s |
| Clock / data fall time | t(f) | - | 300 | - | 300 | ns |
| Clock / data rise time | t(r) | - | 1000 | - | 300 | ns |
2410121814_VISHAY-VCNL36826S_C511579.pdf
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