Product Overview
The TLE4966L is a high-precision, integrated double Hall-effect sensor IC designed for demanding applications requiring accurate direction and speed detection. It features a wide supply voltage range (2.7 V to 24 V), operation from unregulated power supplies, and exceptional stability of magnetic switching points due to active error compensation and chopper techniques. The device provides distinct speed and direction signals, with the direction signal outputting prior to the speed signal, enabling precise rotational analysis. Its robust design includes reverse battery protection and resistance to mechanical stress, making it suitable for applications where reliability and accuracy are paramount.
Product Attributes
- Brand: Infineon Technologies
- Model: TLE4966L
- Package Type: PG-SSO-4-1
Technical Specifications
| Parameter | Symbol | Limit Values | Unit | Conditions |
|---|---|---|---|---|
| Supply voltage operation | VS | 2.7 to 24 | V | |
| Reverse battery protection | VS | -18 | V | for 1 h, RS 200 |
| Peak temperature tolerance | Tj | 195 | C | without damage |
| Low jitter | tQJ | typ. 1 | s | RMS |
| Hall plate distance | dHALL | 1.45 | mm | |
| Supply current | IS | 4 to 7 | mA | VS = 2.7 V ... 18 V |
| Output saturation voltage | VQSAT | 0.3 to 0.6 | V | IQ = 10 mA |
| Output fall time | tf | 0.2 to 1 | s | RL = 1.2 k; CL < 50 pF |
| Output rise time | tr | 0.2 to 1 | s | RL = 1.2 k; CL < 50 pF |
| Chopper frequency | fOSC | typ. 320 | kHz | |
| Switching frequency | fSW | 0 to 15 | kHz | Requires 1.4x magnetic signal amplitude |
| Delay time | td | typ. 13 | s | Systematic delay between magnetic threshold reached and output switching |
| Count Signal Delay | tdc | 50 to 1000 | ns | |
| Power-on time | tPON | typ. 13 | s | VS 2.7 V |
| Operate point | BOP | 4.7 to 10.3 | mT | Tj = -40 to 150 C |
| Release point | BRP | -10.3 to -4.7 | mT | Tj = -40 to 150 C |
| Hysteresis | BHYS | 10.0 to 20.0 | mT | Tj = -40 to 150 C |
| Magnetic matching | BMATCH | -2.0 to 2.0 | mT | Valid for BOP1 - BOP2 and BRP1 - BRP2 |
| Magnetic offset | BOFF | -2.0 to 2.0 | mT | (BOP + BRP)/2 |
| Temperature compensation of magnetic thresholds | TC | typ. -350 | ppm/C | |
| Distance between chip and package surface | d | 0.3 | mm | 0.1 |
2409291934_Infineon-TLE4966L_C283958.pdf
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